High-speed/reliability multilevel FeFET memory with atomic-layer-deposited TiO₂ channel and HZO ferroelectric

¹ School of Microelectronics, Fudan University - Shanghai 200433, China
² Jiashan Fudan Institute - Jiaxing, Zhejiang 314100, China

Received: 17 October 2025
Accepted: 25 November 2025

Abstract

Atomic-layer-deposited TiO₂-/hafnium zirconium oxide (HZO)-based ferroelectric field-effect transistors (FeFETs) have been fabricated for non-volatile memory applications through a single-step post-device annealing process. In this work, the TiO₂ layer serves as both the conductive channel and capping layer, promoting the formation of ferroelectric phase in HZO after annealing at ≥ 350 °C. A memory window of 2 V is obtained under optimized annealing temperature of 600 °C, accompanied by a minimum subthreshold swing and a maximum drain current, and the resulting maximum double remanent polarization (2) is 25.2 μC/cm². Further, the TiO₂ FeFET memory with a channel length of 80 nm shows fast program/erase speeds (10 ns under 3 V /4.5 V ), yielding a current window over 10². Stable 2-bit retention and endurance exceeding 10⁹ cycles at 85 °C are achieved. These results suggest the TiO₂/HZO FeFET memory is promising for low-power embedded non-volatile memory (eNVM) and monolithic three-dimensional (3D) integration applications.